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  agilent acpm-7831 cdma 1900, pcs power amplifier module data sheet description the acpm-7831 is a fully matched cdma power amplifier module. designed around agilent technologies new enhancement mode phemt (e-phemt) process, the acpm-7831 offers premium performance in a small, easy to use package . fully matched to 50 ohms on the input and output allows faster design, less overall system optimization and more reliable performance in production. the amplifier has excellent acpr and efficiency perfor- mance , at both high and medium features ? operating frequency: 1850 C 1910 mhz ? 28.5 dbm linear output power @ 3.4 v ? high efficiency: 40% pae ? internal 50 ohm matching networks for both rf in/out ? 3.2 C 4.2 v linear operation ? cdma2000 1xrtt capable ? excellent operation at vdd = 3.0v ? only 3 smt parts needed ? dynamic bias control or ? very low quiescent current with single control voltage ? 6.0 x 6.0 x 1.8 mm smt package applications ? 1900 mhz cdma handsets ? wireless data terminals pout levels, with a single bias control voltage. for lower quiescent current, a dynamic bias control circuit can be used; vcntl = 1.2 v to 2.7 v. designed in a surface mount rf package, the acpm-7831 is cost and size competitive. the acpm-7831 is another key component of the agilent cdmadvantage rf chipset. package circuit diagram gnd pin 6 pin 5 pin 4 pin 1 pin 2 pin 3 gnd bottom view of packa g e vdd1 vdd1 rf in rf in vcntl vcntl rf out rf out vdd2 vdd2
2 absolute maximum ratings [1] parameter unit value vdd supply voltage v 5.0 power dissipation [2] w 2.5 bias current a 1.5 control voltage (vcntl) v 3.0 amplifier input rf power dbm 10 junction temperature c +150 storage temperature (case temperature) c -30 to +100 notes: 1. operation of this device in excess of any of these limits may cause permanent damage. 2. tcase = 25 c thermal resistance [2] jc = 28 c/w recommended operating range of vdd = 3.2 to 4.2 v, ta = -30 to +85 c package marking and dimensions acpm-7831 yywwdd gnd rf out vdd2 vdd1 rf in vcntl gnd .236 0.0120 (6 0.30) .118 (3.00) .078 (1.98) .048 (1.22) .006 (0.16) .030 (0.76) r.020 (r0.51) .034 (0.86) bottom view ( footprint ) top view (package with lid cover on top) side view .005 (0.13) .098 (2.49) i/o pad .236 0.0120 (6.00 0.30) 0.234 0.003 (5.94 0.08) maximum 0.071 (1.8) square lid cover pcb 0.236 0.0120 (6.00 0.30)
3 electrical characterization information all tests are done in 50 ? system at v dd = 3.4v, 25 c , unless noted otherwise. parameter units min typ max comments pcs cdma frequency range mhz 1850 1910 gain (fixed cntl voltage) (p out = 28.5 dbm) db 24 26 vcntl= 2.2v (p out = 13 dbm) db 25 vcntl= 2.2v (p out = -5 dbm) db 24 vcntl= 2.2v gain (dynamic cntl voltage) (p out = 28.5 dbm) db 24 26 vcntl= 2.2v (p out = 13 dbm) db 23 vcntl= 1.6v (p out = -5 dbm) db 17 vcntl= 1.2v power added efficiency p out = 28.5 dbm % 36 40 vcntl= 2.2v p out = 16 dbm % 8.5 vcntl= 1.6v total supply current ma 575 p out = 28.5 dbm, vcntl= 2.2v 100 p out = 13 dbm, vcntl= 1.6v 30 p out = -5 dbm, vcntl= 1.2v acpr @ 1.25 mhz offset dbc/30khz -45 -48 p out 28.5 dbm acpr @ 1.98 mhz offset dbc/30khz -53 -55 p out 28.5 dbm quiescent current ma 60 p out 28.5 dbm, vcntl= 2.2v 40 p out 13 dbm, vcntl= 1.6v 30 p out 0 dbm, vcntl= 1.2v input vswr (p out = 28.5 dbm) 2.0:1 input vswr (p out = 16 dbm) 2.5:1 noise figure db 3.5 noise power @ 80 mhz offset in 1930 1990 mhz dbm/hz -138 stability (spurious): load vswr 5:1 dbc -50 all phases harmonic suppression 2fo dbc -40 -30 3fo dbc -40 -30
4 typical performance data measured in a 50 ? system, vdd = 3.4v, vcntl = 2.2v, t = 25 c, freq = 1880 mhz. figure 1. gain vs. pout. figure 2. gain vs. vcntl. figure 3. pae vs. pout. figure 4. idd vs. output power. figure 5. idd vs. low-mid output power vdd = 3.4v, vcntl = 2.2v and 1.2v. figure 6. acpr (1.25 mhz) vs. pout. vcntl (v) gain (db) 0 0.8 0.4 1.6 2.4 1.2 2.0 2.8 30 20 10 0 -10 -20 -30 pout (dbm) pae (%) 0 50 40 30 20 10 0 10 5202530 15 pout (dbm) idd (ma) 0 700 600 500 400 300 200 100 0 10 5202530 15 pout (dbm) idd (ma) 0 51520 10 200 180 160 140 120 100 80 60 40 20 0 pout (dbm) acpr1 (dbc) 0 -40 -45 -50 -55 -60 -65 -70 -75 -80 10 5202530 15 pout (dbm) figure 7. acpr (1.98 mhz) vs. pout. acpr2 (dbc) 0 -50 -55 -60 -65 -70 -75 -80 -85 -90 10 5202530 15 pout (dbm) figure 8. 2nd/3rd harmonics vs. pout. harmonic suppression (dbc) 10 15 25 30 2fo 3fo 20 -30 -35 -40 -45 -50 -55 -60 pout (dbm) gain (db) 0 30 29 28 27 26 25 10 5202530 15 vcntl = 2.2v vcntl = 1.2v
5 ordering information part number no. of devices container acpm-7831-blk 10 bulk ACPM-7831-TR1 2000 13 tape and reel tape dimensions and orientation 0.30 0.05 ? 1.50 (min) 8.0 0.10 pa orientation in carrier tape acpm-78xx yyww notes: 1. ao and bo measured at 0.3 mm above base of pocket. 2. 10 hole pitch cumulative tolerance 0.2 mm 3. drawing not to scale. 6.40 0.10 2.00 0.10 6.40 0.10 (bo) 4.00 0.10 see note 2 12.00 0.30 5.50 0.05 1.55 0.05 ? 1.55 0.05 2.00 0.05 6.40 0.10 6.40 0.10 (ao)
6 reel drawing all dimensions in mm. 100.00 0.5 329.2 0.5 18.40 (max.) c l c l m slot 5.00 0.50 recycle symbol recycle symbol detail x detail x esd label 76.2 mm x 31.0 mm (see below) embossed line x2 90 mm length lines 147 mm away from center point embossed "m" 5 mm height 13.20 0.50 100.00 0.5 329.2 0.5 i t w 1 3 0 4 20.20 (min.) 13.0 0.50 C 0.20 2.00 0.5
7 application information the following material is presented to assist in general design and use of the apcm-7831. ? 3.0v characterization, for use in data card applications ? cdma2000 1xrtt description and characterization data ? design tips on various methods to control the bias on vcntl pin ? description of acpr measurement methods ? description of agilent evaluation demoboard for acpm-7831 ? ir reflow profile (applicable for all agilent e-phemt pas) 3.0 v characterization, data card applications all tests are done in 50 ? system at v dd = 3.0 v, 25 c , unless noted otherwise. parameter units min typ max comments pcs cdma frequency range mhz 1850 1910 gain (fixed cntl voltage) (p out = 28.5 dbm) db 24 26 vcntl = 2.2v (p out = 13 dbm) db 25 vcntl = 2.2v (p out = -5 dbm) db 24 vcntl = 2.2v power added efficiency p out = 28.5 dbm % 44 vcntl = 2.2v p out = 16 dbm % 9 vcntl = 2.2v total supply current ma 575 p out = 28.5 dbm, vcntl = 2.2v 100 p out = 13 dbm, vcntl = 1.6v 30 p out = -5 dbm, vcntl = 1.2v acpr @ 1.25 mhz offset dbc/30 khz -44 p out 28.5 dbm acpr @ 1.98 mhz offset dbc/30 khz -55 p out 28.5 dbm quiescent current ma 60 p out 28.5 dbm, vcntl = 2.2v input vswr (p out = 28.5 dbm) 2.0:1 (p out = 16 dbm) 2.5:1 noise figure db 3.5 noise power @ 80 mhz offset in 1930 1990 mhz dbm/hz -138 stability (spurious): load vswr 5:1 dbc -50 all phases harmonic suppression 2fo dbc -40 3fo dbc -40
8 typical performance vdd = 3.0v, vcntl = 2.2v, frequency = 1880 mhz pout (dbm) figure 9. gain vs. pout. gain (db) 0 28 26 24 22 20 510 2025 15 vcntl = 1.6v vcntl = 2.2v pout (dbm) figure 10. pae vs. pout. pae (%) 0 50 40 30 20 10 0 510 2025 15 vcntl = 1.6v vcntl = 2.2v pout (dbm) figure 11. idd vs. pout. idd (ma) 0 600 500 400 300 200 100 0 510 2025 15 vcntl = 1.6v vcntl = 2.2v pout (dbm) figure 12. acpr (1.25 mhz) vs. pout. acpr (dbc) 0 -40 -45 -50 -55 -60 -65 -70 -75 -80 510 2025 15 vcntl = 1.6v vcntl = 2.2v pout (dbm) figure 13. acpr (1.98 mhz) vs. pout. acpr (dbc) 0 -50 -55 -60 -65 -70 -75 -80 -85 510 2025 15 vcntl = 1.6v vcntl = 2.2v vcntl (v) figure 14. gain vs. vcntl. gain (dbc) 30 20 10 0 -10 -20 -30 0 2.8 0.4 0.8 2.0 2.4 1.2 1.6
9 cdma2000 1xrtt characterization system description cdma2000 is the tia s standard for third generation (3g) technol- ogy and is an evolution of the is-95 cdma format. cdma2000 includes 1x rtt in the single- carrier mode and 3x rtt in the multi-carrier mode. cdma2000 1x rtt, being an extension of the is-95 standard, has a chip rate of typical channel configurations below are based on the transmitter test condition in the reverse link. 1) basic voice only configuration r-pich @ -5.3 db r-fch @ -1.5 db 9.6 kbps 2) voice and data configuration r-pich @ -5.3 db r-fch @ -4.54 db 9.6 kbps r-sch1 @ -4.54 db 9.6 kbps 3) voice and control configuration r-pich @ -5.3 db r-fch @ -3.85 db 9.6 kbps r-dcch @ -3.85 db 9.6 kbps 4) control channel only configuration r-pich @ -5.3 db r-dcch @ -1.5 db 9.6 kbps 1.2288mchip/s is-95. however, in 1x rtt, the reverse link trans- mits more than one code channel to accommodate the high data rates. the minimum configura- tion consists of a reverse pilot (r-pilot) channel for synchro- nous detection by the base transceiver stations (bts) and a reverse fundamental channel (r-fch) for voice. additional channels such as the reverse supplemental channels (r-schs) and the reverse dedicated channel (r-dcch) are used to send data or signaling informa- tion. channels can exist at different rates and power levels. table 1 shows the transmitter specification in cdma2000 reverse link. specification spread rate1 erp at maximum lower limit +23 dbm output power upper limit +30 dbm minimum controlled output power -50 dbm/1.23 mhz waveform quality factor and frequency accuracy >0.944 sr1, band class 0(cellular band) sr1, band class1(pcs band) 885 khz to 1.98 mhz 885 khz to 1.98 mhz less stringent of -42 dbc/30 khz less stringent of -42 dbc/30 khz or -54 dbm/1.23 mhz or -54 dbm/1.23 mhz 1.98 mhz to 3.125 mhz 1.98 mhz to 2.25 mhz less stringent of -54 dbc/30 khz less stringent of -50 dbc/30 khz or -54 dbm/1.23 mhz or -54 dbm/1.23 mhz 3.125 mhz to 5.625 mhz 2.25 mhz to 6.25 mhz -13 dbm/100 khz -13 dbm/1 mhz table 1. transmitter specification in reverse link. spurious emission at maximum rf output power offset frequency within the range
10 electrical data all tests are done in 50 ? system at v dd = 3.4v, 25 c , unless noted otherwise. parameter units measured comments pcs cdma frequency range mhz 1850 1910 gain (fixed control voltage) (p out = 28.5 dbm) db 26 vcntl = 2.2v (p out = 13 dbm) db 25 vcntl = 2.2v (p out = -5 dbm) db 24 vcntl = 2.2v gain (dynamic control voltage) (p out = 28.5 dbm) db 26 vcntl = 2.2v (p out = 13 dbm) db 23 vcntl = 1.6v (p out = -5 dbm) db 17 vcntl = 1.2v power added efficiency p out = 28.5 dbm % 40 p out = 16 dbm % 8.5 acpr @ 1.25 mhz offset dbc/30 khz basic -52 p out 28.5 dbm voice + data -45 p out 28.5 dbm voice + control -44 p out 28.5 dbm control only -52 p out 26.0 dbm acpr @ 1.98 mhz offset dbc/30 khz basic -62 p out 28.5 dbm voice + data -59 p out 28.5 dbm voice + control -60 p out 28.5 dbm control only -60 p out 26.0 dbm combinations of these channels will increase the peak to average power ratio for higher data rates. the complementary cumulative distribution function (ccdf) measurement characterizes the peak to average power statistics of cdma2000 reverse link. for reference, the system specifica- tions of peak to average power ratio of is-95 and cdma2000 ix rtt are 3.9 db and 5.4 db at 1% ccdf respectively. higher peak to average power ratio requires a higher margin, both in higher power gain and in typical channel configurations (a) basic voice only configuration r-pich @ -5.3 db r-fch @ -1.5 db 9.6 kbps (b) voice and data configuration r-pich @ -5.3 db r-fch @ -4.54 db 9.6 kbps r-sch1 @ -4.54 db 9.6 kbps (c) voice and control configuration r-pich @ -5.3 db r-fch @ -3.85 db 9.6 kbps r-dcch @ -3.85 db 9.6 kbps (d) control channel only configuration r-pich @ -5.3 db r-dcch @ -1.5 db 9.6 kbps definitions: r-pich reverse pilot channel r-fch reverse fundamental channel r-sch reverse supplemental channel r-dcch reverse dedicated control channel improved thermal stability for pa linearity to meet the minimum system specifications. test results for the acpm-7831 as tested under 4 cdma2000 chan- nel configurations are shown in the table below. peak to average power ration (pout = 16 dbm) ccdf(%) basic voice + data voice + cntl cntl only 10 1.98 3.20 3.26 3.87 1 3.48 4.48 4.94 5.50 0.1 4.35 5.32 5.89 6.47 0.01 4.82 5.81 6.42 6.91 0.001 5.01 6.17 6.64 7.12 0.0001 5.11 6.25 6.76 7.19
11 design tips to use vcntl pin power amplifier control using vcntl pin on acpm-7831 power amplifier control scheme in cdma systems is one of the important and challenging aspects of cdma-based handset design. handset designers must balance maintaining adequate linearity while optimizing efficiency at high, medium and low output power levels. the primary method to achieve these goals is to adjust the bias of the pa as a function of output power. theoretically, the best efficiency would be achieved when the bias of the pa is continually adjusted based on the output power requirement of the pa. however, implementing this type of circuit is complex and costly. therefore several different approaches have been developed to provide an acceptable trade-off between optimum efficiency and optimum manufacturability. the following section reviews four methods of controlling the bias of a cdma power amplifier: fixed, step, logical and dynamic. 1. fixed bias control using a fixed bias point on the pa is the traditional method, and it is the simplest. in fact, a fixed control voltage is recommended when using agilent s power amplifiers, vcntl = 2.2v for the acpm-7831. the vcntl pin on the pa is controlled by pa_on pin of the baseband ic. when pa_on is high, the output rf signal of the pa is enabled, enabling the subscriber unit to transmit the required data. the switch circuit supplies the vcntl with enable/ disable (pa on/off mode). below is an example of how to control the pa_on and vcntl pin of the pa. power mode pa_on vcntl power range shut down low 0v high power high 2.2v* 28.5 dbm note: * vcntl for pcs band to duplexer battery vdd1 vdd2 vcntl pa txic switch circut for pa baseband ic pa_on enable
12 2. step bias control the pdm1 output from the baseband ic can be used to create a software-programmable voltage, to be used at the phone designer s discretion. the two- pole filter is used to improve rf performance in terms of fast response time. to get high efficiency and better acpr, the phone designers can change control voltage of the pa by adjusting pdm1 voltage according to output power of pa. a caution when using this approach careful consideration must be made to avoid an abrupt disconti- nuity in the output signal when the step bias control voltage is applied. below shows the example how to control the pa_on, pdm1 and vcntl pin of pa. power mode pa_on vcntl power range shut down low 0v low power high 1.2v ~ -5 dbm mid power high 1.6v -5 dbm ~ 13 dbm high power high 2.2v 13 dbm ~ 28.5 dbm note: adjust pdm1 pulse waveform to set low/mid/high power mode to duplexer battery vdd1 vdd2 vcntl pa txic switch circut for pa baseband ic c1 r1 c2 r2 pa_on pdm1
13 3. logical bias control this scheme is similar to step bias control circuit above but also uses the pa_r0 and pa_r1 pins on a typical baseband ic. pa_r[1:0] is an open-drain output, requiring an external pull-up resistor, and is used to step the gain of the tx signal path by changing voltages on vcntl. as with the step bias control, there must be some consideration of the hysteresis step to avoid an abrupt disconti- nuity with logical bias control voltage. below shows the example how to control the pa_r[1:0] and vcntl pin of pa. power mode pa_ro pa_r1 vcntl power range shut down 0 0 0v low power 0 1 1.2v ~ -5 dbm mid power 1 0 1.6v -5 dbm ~ 13 dbm high power 1 1 2.2v 13 dbm ~ 28.5 dbm vdd1 vdd2 vcntl pa to duplexer battery enable switch circuit for pa enable tx i c switch circuit pull-up resistors pa_on baseband ic pa_r0 pa_r1
14 4. dynamic bias control phone designers can use tx_adc_adj pin of the baseband ic to get dynamic bias control with vcntl pin of pa. tx_adc_adj is a pdm output pin produced by the tx agc subsystem and used to control the gain of the tx signal prior to the pa. the variable output levels from two inverting operational amplifiers, generated and com- pared by tx_adc_adj, provide dynamic control voltages for the vcntl of 1.0v ~ 2.7v with a 0.1v step. av = -(v1/vin) = -r3/r2, v1 = -(r3/r2)vin, vo = -(r5/r4)v1= [(r5 * r3)/(r4 * r2)] * vin the using of combination of two pins, pdm1 and tx_adc_adj, is another method of realizing a dynamic bias control scheme. the two op amps control the vcntl voltage levels with com- pared and integrated circuits. to duplexer battery vdd1 vdd2 vcntl pa + _ + _ r3 v1 r4 r5 r2 vin c1 r1 pa_on tx_adc_adj baseband ic tx i c vcontrol switch circuit enable to duplexer battery vdd1 vdd2 vcntl pa + _ + _ pa_on tx_adc_adj pdm1 baseband ic tx i c vcontrol switch circuit enable
15 acpr measurement method adjacent-channel power ratio (acpr) is used to characterize the distortion of power amplifiers and other subsystems for their tendency to cause interference with neighboring radio channels or systems. the acpr measure- ment often is specified as the figure 15. cdma adjacent-channel power ratio measurement. ratio of the power spectral density (psd) of the cdma main channel to the psd measured at several offset frequencies. for the cellular band (824 ~ 849 mhz transmitter channel), the two offsets are at 885 khz and 1.98 mhz and the measurement resolution bandwidth specified is 30 khz. these offsets are at 1.25 mhz and 1.98 mhz for the pcs band (1850 ~ 1910 mhz tx channel). offset frequencies 1st acpr 2nd acpr cellular band 885 khz 1.98 mhz pcs band 1.25 mhz 1.98 mhz 1877.5 1878.0 1878.5 1879.0 1879.5 1880.0 1880.5 1881.0 1881.5 1882.0 1882.5 0 -10 -20 -30 -40 -50 -60 -70 -80 30 khz 30 khz 30 khz 30 khz 1.23 mhz 1 st acpr-u 1 st acpr-l 2 nd acpr-l = 1.98 mhz 2 nd acpr-u = 1.98 mhz offset frequency 1st acpr (dbc) 2nd acpr (dbc)
16 acpr testing diagram test pa test setup figure 16. acpr pa test equipment setup. figure 17. acpr measurement using vsa transmitter tester. test result using vsa transmitter tester 8593e spectrum analyzer e4406a vsa transmitter tester power divider 20 db attenuator 3 db attenuator cdma pa acpm7812/7831 vdd1 vdd2 vcntl e4437b cdma signal generator dc power supply ch1 ch2 ch3
17 acpr test results using spectrum analyzer the meaning of 16 db the accurate acpr measurement using spectrum analyzer needs to consider the normalization factor that is dependent on the resolution bandwidth, rbw, settings. the above figure (mea- surement shown at 836 mhz for general example) shows a com- parison of the different acpr measurement results as a func- tion of various rbw values. as the rbw is reduced, less power is captured during the measure- ment and consequently the figure 18. example acpr measurement using spectrum analyzer. channel power is recorded as a smaller value. for example, if the main channel power is measured as 28 dbm in a 1.23 mhz band- width, its power spectral density is 28 dbm/1.23 mhz, which can be normalized to 11.87 dbm/ 30 khz. the equation used to calculate the normalization factor of power spectral density is: normalization factor = 10log[normalization bw/current bw (spectrum analyzer rbw)] = 10log[1.23x10 6 /30x10 3 ] = 16.13 db since the acpr in an is95 system is specified in a 1.23 mhz bandwidth, a channel power that is measured using a different rbw, can be normalized to reflect the channel power as if it was measured in a 1.23 mhz bandwidth. the difference in channel power measured in 30 khz bandwidth and the channel power measured in a 1.23 mhz bandwidth is 16 db. ref 42.8 dbm at 30 db rbw = 1.0 mhz rbw = 30 khz rbw = 30 khz mkr 836 mhz 35.42 dbm center 836 mhz vbw 100 khz span 5.000 mhz swp 2.00 sec
18 acpr test results with agilent acpm-7831 cdma pa test condition: vdd1 = vdd2 = 3.4v typ., vcntl = 2.2v, frequency = 1880 mhz pout (dbm) 1 st acpr measurement acpr1 (dbc) 030 -40 -45 -50 -55 -60 -65 -70 -75 -80 510 2025 15 -30 c +25 c +60 c pout (dbm) 2 nd acpr measurement acpr2 (dbc) 030 -55 -60 -65 -70 -75 -80 -85 -90 510 2025 15 -30 c +25 c +60 c
19 acpm-7831 demoboard operation instructions 1) module description the acpm-7831 is a fully matched power amplifier. the sample device is provided on a demon- stration pc board with sma connectors for rf inputs and outputs, and a dc connector for all bias and control i/o s. 2) circuit operation the design of the power module (pam) provide bias control via vref (vcntl) to achieve optimal rf performance and power control. the control pin is labeled vref (vcntl). please refer to figure 3 for the block diagram of this pam. typical operation conditions (vdd = 3.4v) parameter acpm-7831 frequency range 1850 1910 mhz output power 28.5 dbm vcntl (vref) 2.2 v 3) maximum ratings vdd 5.0v drain current 1.5a vref (vcntl) 3v rf input 10 dbm temperature -30 to 80 c please note: avoid electrostatic discharge on all i/o s. 4) heat sinking the demonstration pc board provides an adequate heat sink. maximum device dissipation should be kept below 2.5 watts. 5) testing - signal source the cdma modulated signal for the test is generated using an agilent esg-d4000a (or esg- d3000a) digital signal generator with the following settings: cdma setup : reverse spreading: on bits/symbol: 1 data: pn15 modulation: oqpsk chip rate: 1.2288 mcps high crest: on filter: std phase polarity: invert - acpr measurement the acpr (and channel power) is measured using an agilent 4406 vsa with corresponding acpr offsets for is-98c and jstd-8. averaging of 10 is used for acpr measurements. - dc connection a dc connector is provided to allow ease of connection to the i/o s. wires can be soldered to the connector pins, or the connector can be removed and i/ o s contacted via clip leads or direct soldered connections. the wiring of i/o s are listed in figure 1 through 3 and pin configuration table. the vdd sense connections are provided to allow the use of remote- sensing power supplies for compensation for pcb traces and cable resistance. - device operation 1) connect rf input and output for the band under test. 2) terminate all unused rf ports into 50 ohms. 3) connect vdd1 and vdd2 supplies (including remote sensing labeled vdd1 s and vdd2 s on the board). nomi- nal voltage is 3.4v. 4) apply rf input power accord- ing to the values listed in operation data in data packet. 5) connect vref (vcntl) supply and set reference voltage to the voltage shown in the data packet. note that the vref (vcntl) pin is on the back side of the demonstration board. please limit vref (vcntl) to not exceed the corresponding listed dc biasing condition in the data packet. note that increasing vref (vcntl) over the corresponding listed dc biasing condition can result in power decrease and current can exceed the rated limit. power module block diagram input vdd1 power input match on chip inter-stage match passive output match vdd2 output vcntl ( vref )
20 acpm-7831 evaluation board schematic and layout layer 1 C top metal & solder mask (pcs) c3 rf out pcs c1=4700 pf c2=4700 pf c3=2.2 f c4=1800 pf c2 c4 gnd gnd vdd1 vdd2 gnd rf in c1 top side back side 1 ground 1b vdd2 sense 2 ground 2b ground 3 vdd1 3b vdd1 sense 4 ground 4b vref (vcntl) 5 vdd2 5b ground pin configuration table gnd vdd1 vdd1 rf in rf in vcntl vcntl rf out rf out vdd2 vdd2 c3 c2 c1 c4
21 layer 2 C ground layer 3 C bottom metal & solder mask gnd vref vdd1 s vdd2 s gnd
22 ir reflow soldering figure 19 is a straight-line representation of the recom- mended nominal time-tempera- ture profile from jesd22-a113-b ir reflow. figure 19. time-temperature profile for ir reflow soldering process. table 1. ir reflow process zone. process zone ? temperature ? temperature/ ? time preheat zone 25 c to 100 c3 c/s max soak zone 100 c to 150 c 0.5 c/s max (120s max) reflow zone 150 c to 235 c (240 c max) 4.5 c/s typ 235 c to 150 c -4.5 c/s typ cooling zone 150 c to 25 c-6 c/s max table 2. classification reflow profiles. convection or ir/convection average ramp-up rate (183 c to peak) 3 c/second max. preheat temperature 125 ( 25) c 120 seconds max. temperature maintained above 183 c 60 150 seconds time within 5 c of actual peak temperature 10 20 seconds peak temperature range 220 +5/-0 c or 235 +5/-0 c ramp-down rate 6 c/second max. time 25 c to peak temperature 6 minutes max. note: all temperatures measured refer to the package body surface. time (seconds) temperature ( c) 0 50 150 100 200 183 235 60 90 30 120 150 210 180 270 300 240 60 to 150s above 183 c cooling zone reflow zone soak zone preheat zone
23 zone 1 C preheat zone the average heat up rate for surface-mount component on pcb shall be less than 3 c/ second to allow even heating for both the component and pcb. this ramp is maintained until it reaches 100 c where flux activation starts. zone 2 C soak zone the flux is being activated here to prepare for even and smooth solder joint in subsequent zone. the temperature ramp is kept gradual to minimize thermal mismatch between solder, pc board and components. over- ramp rate here can cause solder splatter due to excessive oxida- tion of paste. zone 3 C reflow zone the third process zone is the solder reflow zone. the tempera- ture in this zone rises rapidly from 183 c to peak temperature of 235 c for the solder to trans- form its phase from solid to nominal stencil thickness component lead pitch 0.102 mm (0.004 in) lead pitch less than 0.508 mm (0.020 in) 0.152 mm (0.006 in) 0.508 mm to 0.635 mm (0.02 in to 0.025 in) 0.203 mm (0.008 in) lead pitch greater than 0.635 mm (0.025 in) liquids. the dwell time at melting point 183 c shall maintain at between 60 to 150 seconds. upon the duration of 10 C 20 seconds at peak temperature, it is then cooled down rapidly to allow the solder to freeze and form solid. extended duration above the solder melting point can poten- tially damage temperature sensitive components and result in excessive inter-metallic growth that causes brittle solder joint, weak and unreliable connections. it can lead to unnecessary damage to the pc board and discoloration to component s leads. zone 4 C cooling zone the temperature ramp down rate is 6 c/second maximum. it is important to control the cooling rate as fast as possible in order to achieve the smaller grain size for solder and increase fatigue resistance of solder joint. solder paste the recommended solder paste is type sn6337a or sn60pb40a of j-std-006. note: solder paste storage and shelf life shall be in accordance with manufacturer s specifications. stencil or screen the solder paste may be depos- ited onto pcb by either screen printing, using a stencil or syringe dispensing. the recom- mended stencil thickness is in accordance to jesd22-b102-c.
www.agilent.com/semiconductors for product information and a complete list of distributors, please go to our web site. for technical assistance call: americas/canada: +1 (800) 235-0312 or (408) 654-8675 europe: +49 (0) 6441 92460 china: 10800 650 0017 hong kong: (+65) 6271 2451 india, australia, new zealand: (+65) 6271 2394 japan: (+81 3) 3335-8152(domestic/international), or 0120-61-1280(domestic only) korea: (+65) 6271 2194 malaysia, singapore: (+65) 6271 2054 taiwan: (+65) 6271 2654 data subject to change. copyright ? 2002 agilent technologies, inc. october 10, 2002 5988-6656en


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